Say what upscaler_idle_wait = 1 brings back and what it does not.

The review of 9071dfc3 found that nx2navi.ini.example, cfg.c's metas comment, the commit message and docs/architecture.md
said the rollback switch works "as up to 0.10.1", which it does not exactly. With 1, every place that lets something go
waits for the device again, C-5's queue-lock hazard with it, but what was let go of still goes through vk_dlaa.c's list
and vk_memory.c's deferred destruction, the motion vectors and the HUD-less picture keep their 8-present gate,
vk_upscaler_settle leaves what the submission being recorded names, stale_sizes waits once per call, and a refused DLSS
creation with features let go of still listed waits and tries again, where 0.10.1 turned DLAA off. Each difference is
the safer side. The ini line now says that the game waits at each change as up to 0.10.1 while what was let go of
still goes once the card is past it; cfg.c, vk_dlaa.c's "what the upscalers let go of" and docs/architecture.md say
the same. Comments and docs only.

Checks that passed: cfg_rows_check (0 problems), upscaler_idle_check, cfg.c and vk_dlaa.c compile with -Wall -Wextra
and no warning, tools/check_content.py --staged.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

docs/architecture.md

@@ -380,8 +380,8 @@ keeps per-core data without locks and relies on that, so the host models it (`ru
   while (`vk_dlaa.c` `idle_release`, `vk_fsr.c` `idle_note`, `vk_aa.c` `work_idle`). What DLSS or FSR lets go of at
   a change of size or mode (a network, an FSR context, a work image) goes once the GPU is past the last submission that
   used it, and an image frame generation reads at a present some presents later, without a wait for the device on the
-  replaying thread (`vk_dlaa.c` "what the upscalers let go of", `vk_up_defer.h`; `upscaler_idle_wait = 1` waits as
-  before).
+  replaying thread (`vk_dlaa.c` "what the upscalers let go of", `vk_up_defer.h`; `upscaler_idle_wait = 1` waits for
+  the device at each such change as before, and the freeing keeps these gates).
 - Translated shaders at rest: the shader memory cache keeps every shader for the whole session, but a shader's SPIR-V
   is read only while modules are made of it. A background thread compresses (zstd, checked by decoding it) the SPIR-V
   of each shader no reader used for `shader_compress_idle_s` seconds (30) and frees the plain copy; a reader pins it